It was less than a year ago that we covered Nanowires Enable FinFET Successor which looked at the use of Nanowires to create transistors and improve on FinFET technology which had become the primary transistor construction technology for complex semiconductors. This was using 8nm Nanowires and was expected to be the next generation of transistor technology.
Now IBM have announced a new breakthrough using Nanosheets to create 5nm transistors. And this is likely to completely take over the role that Nanowires were expected to fulfil. Here is how they did it.
The primary breakthrough is to take the vertical fins of the FinFET and turn them into horizontal Nanosheets as shown below.
5nm stacked Nanosheet transistor structure
And a photograph looks like this.
For a more complete description of the technology, this video covers some of the details on why this will lead to a scalable production process.
At the moment, the dominant transistor technology used to make high density silicon devices is the FinFET. This is made using vertical fins allowing the gate to wrap around the Source and Drain. This improves control of the channel. The video below shows exactly how this is constructed and how it works.
FinFETs have dominated dense semiconductor design and manufacture since 2011 and are the reason we have been able to continue driving device density higher while not increasing heat by the same amount.
So what comes next?
It is believed the logical next step is to fully wrap the gate around the source and drain region creating a Gate-all-around Device. This gives maximum control while also reducing leakage to transistors either side. Nanotechnology researcher imec has demonstrated one method of achieving this by wrapping a silicon gate around 8nm wide nanowires. This Lateral Nanowire Gate All Around FET could prove to be a candidate to replace FinFETs as the demand for device density continues to grow.
Lateral Nanowire Transistor
And an isometric view of the Lateral Nanowires and the gate structure wrapped around them.
Lateral Nanowire Gate-All-Around FET
One benefit of this approach is that the fabrication process is very similar to FinFET fabrication and so the transition to the new technology might not require significant investment in new equipment. This is quite different to shrinking the technology from 10nm to 7nm or 5nm which usually required significant research, process development and equipment reinvestment.